The NL932 is a no-clean lead free solder paste designed to meet the requirements for reliable solder joints in Printed Circuit Board assemblies. NL932 displays previously unseen levels of repeatability and consistency even in a wide range of temperatures (65º-85ºF) and relative humidity (25-65% RH). NL932 offers enhanced printing and reflow process windows. Aditionally, NL932's capability of IPC Class III for voiding and ROL-0 IPC classification ensures long-term reliability.
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Stencil aperture design and stencil quality are major factors in achieving excellent print consistency with any lead free solder paste. Laser Cut stencils from Stencils Unlimited are recommended for optimal print performance, and can be custom designed to minimize and improve the yields of any process. Some general stencil aperture design guidelines follow:
A 0.001” reduction (L & W) to minimize bridging and create proper gasketing between the stencil and SMT pad.
A 0.002” reduction (L & W) for water washable and a 0.002” reduction (L & W), with “U-shaped” home-plates, for no clean to minimize mid-chip solder beads.
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Slump 0.7mm Pads |
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A linear ramp of 0.7°C to 2.0°C C/second is suggested to gradually remove the solvents and other volatile components in the lead free solder paste. This also helps in minimizing solder balls, beading and bridging from hot slump. A linear ramp also helps minimize depletion of flux activity which can occur with excessive temperature, preheat times, and at very high reflow temperatures.
A profile with a soak between 200-210°C for less than 20 seconds can be used to reduce void formation on BGA and CSP devices. (Request FCTA’s profile guide to void reduction). While a linear profile typically does not produce tombstoning, a short 10-20 second dwell prior to transitioning into the liquidus point of the solder, and minimizing the QR between soak and liquid temperatures will help minimize tombstoning if experienced.
A cooling rate of 3°C-4°C per second is recommended for most lead/free reflow applications. These parameters should be utilized to insure a fine grain solder structure and minimal IMC layer.